A low-power ASIC design for cell search in the W-CDMA system.
Chi-Fang LiYuan-Sun ChuWern-Ho SheenFu-Chin TianJan-Shin HoPublished in: IEEE J. Solid State Circuits (2004)
Keyphrases
- low power
- single chip
- high speed
- low power consumption
- power consumption
- low cost
- logic circuits
- vlsi architecture
- cmos technology
- digital signal processing
- power dissipation
- mixed signal
- vlsi circuits
- design methodology
- circuit design
- wireless transmission
- design process
- real time
- gate array
- power reduction
- high power
- embedded systems
- general purpose