A configurable mapreduce accelerator for multi-core FPGAs (abstract only).

Christoforos Kachris Georgios Ch. Sirakoulis Dimitrios Soudris

Published in: FPGA (2014)

Keyphrases

field programmable gate array
cloud computing
parallel implementation
parallel computing
information systems
open source
parallel processing
embedded systems
data sets
neural network
information retrieval
computer vision
image processing
high level
association rules
hardware software