FPGA Validation of Event-Driven ADPLL.

Eugene Koskin Pierre Bisiaux Dimitri Galayko Elena Blokhina

Published in: ECCTD (2020)

Keyphrases

event driven
user friendly
real time
publish subscribe
information delivery
hardware implementation
phase locked loop
high speed
markup language
hardware design
signal processing
field programmable gate array
low cost
real time image processing
back end
database
high level
web services
verilog hdl