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A low jitter multiplying delay-locked loop with static phase offset elimination applied to time-to-digital converter.

Jin WuShuang ChenKang HuLixia ZhengWeifeng Sun
Published in: Microelectron. J. (2020)
Keyphrases
  • single phase
  • real time
  • decision trees
  • mathematical model
  • steady state
  • feedback loop
  • data conversion