A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping.
Meng LiCharbel Abdel NourChristophe JégoJianxiao YangCatherine DouillardPublished in: SiPS (2011)
Keyphrases
- design process
- fpga device
- hardware architecture
- efficient implementation
- rapid prototyping
- hardware implementation
- hardware design
- single chip
- real time
- case study
- xilinx virtex
- fpga hardware
- hardware architectures
- low power consumption
- code generation
- circuit design
- design considerations
- video transmission
- low power
- software engineering
- video sequences
- multimedia