CMOS analog front-end IC for EEG applications with high powerline interference rejection.

Jorge Augusto Costa Tales Cleber Pimenta

Published in: LASCAS (2018)

Keyphrases

analog vlsi
circuit design
signal processing
high speed
wide range
back end
integrated circuit
eeg signals
vlsi circuits
neural network
low cost
high precision
multipath
mixed signal
delay insensitive