Reconfigurable FPGA using genetic algorithm.
D. B. VernekarG. MalhotraV. ColacoPublished in: ICWET (2010)
Keyphrases
- encoding scheme
- genetic algorithm
- field programmable gate array
- hardware implementation
- digital signal
- low cost
- systolic array
- reconfigurable hardware
- fpga implementation
- embedded systems
- parallel computing
- reconfigurable architecture
- fpga technology
- software implementation
- hardware architecture
- image processing algorithms
- general purpose
- neural network
- multi objective
- power reduction
- hardware design
- real time image processing
- real time
- fuzzy logic
- low power consumption
- hardware software
- single chip
- fitness function
- fine grain
- simulated annealing
- high speed
- real coded
- signal processing
- population size
- penalty function
- metaheuristic
- efficient implementation
- data flow