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A 112-fJ/bit 10-Gb/s Charge-Steering Equalizer Utilizing a Discrete-Time Linear Equalizer.

Marco A. SaifAmr T. KotbKhaled M. HassanSameh A. Ibrahim
Published in: MWSCAS (2020)
Keyphrases
  • decision feedback
  • computer simulation
  • multipath
  • high speed
  • shift register
  • real time
  • linear constraints
  • integer arithmetic
  • computational complexity
  • state space
  • end to end