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Real-time scalable hardware architecture for 3D-HEVC bipartition modes.
Gustavo Sanchez
César A. M. Marcon
Luciano Volcan Agostini
Published in:
J. Real Time Image Process. (2017)
Keyphrases
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hardware architecture
real time
hardware architectures
hardware implementation
intra prediction
low cost
low complexity
associative memory
field programmable gate array
case study
multi agent systems
video codec
xilinx virtex