Performance improvement by enhancing spatial parallelism on FPGA for HPC applications.
Yuka SanoTaisuke BokuMitsuhisa SatoMiwako TsujiNorihisa FujitaRyohei KobayashiPublished in: CLUSTER Workshops (2023)
Keyphrases
- high speed
- spatial information
- massively parallel
- high performance computing
- spatial data
- field programmable gate array
- spatial and temporal
- spatio temporal
- significant improvement
- hardware implementation
- parallel processing
- data flow
- spatial relationships
- real time
- real time image processing
- signal processing
- low cost
- spatial databases
- scientific computing
- message passing interface
- spatial reasoning
- computational power
- fault tolerance
- image sequences