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Small Logarithmic Floating-Point Multiplier Based on FPGA and Its Application on MobileNet.
Botao Xiong
Sheng Fan
Xintong He
Tu Xu
Yuchun Chang
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
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floating point
fixed point
square root
instruction set
sparse matrices
floating point arithmetic
input image
high speed
signal processing
data processing
linear programming
index structure
fast fourier transform