A low power memory cell design for SEU protection against radiation effects.

Yuriy Shiyanovskii Aravind Rajendran Christos A. Papachristou

Published in: AHS (2012)

Keyphrases

low power
single chip
low cost
high speed
low power consumption
power consumption
vlsi architecture
power dissipation
logic circuits
digital signal processing
cmos technology
mixed signal
nm technology
gate array
ultra low power
image processing
circuit design
wireless transmission