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Area- Efficient VLSI Implementation of Serial-In Parallel-Out Multiplier Using Polynomial Representation in Finite Field GF(2m).
Saeideh Nabipour
Gholamreza Zare Fatin
Javad Javidan
Published in:
CoRR (2020)
Keyphrases
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vlsi implementation
vlsi architecture
real time
floating point
neural network
low cost
dimensionality reduction
image compression
low complexity