Pure DDP-Based Cipher: Architecture Analysis, Hardware Implementation Cost and Performance up to 6.5 Gbps.
Nick A. MoldovyanNicolas SklavosOdysseas G. KoufopavlouPublished in: Int. Arab J. Inf. Technol. (2005)
Keyphrases
- hardware implementation
- dedicated hardware
- hardware design
- pattern recognition
- fpga technology
- signal processing
- hardware architecture
- software implementation
- fpga implementation
- efficient implementation
- parallel architecture
- pipelined architecture
- real time
- memory management
- low cost
- general purpose
- neural network