Minimization of chip size and power consumption of high-speed VLSI buffers.
Dian ZhouXingya LiuPublished in: ISPD (1997)
Keyphrases
- high speed
- low power
- power consumption
- single chip
- power dissipation
- low power consumption
- energy efficiency
- cmos technology
- power management
- low cost
- dynamic power management
- nm technology
- battery powered
- power saving
- image sensor
- digital signal processing
- chip design
- energy saving
- vlsi design
- battery life
- frame rate
- vlsi implementation
- power reduction
- mobile phone
- sensor networks
- real time