5.6 Gb/s receiver with electrical overstress protection for GDDR in a 45 nm CMOS.
Taner SumesaglamR. SongG. R. MurrayA. GuerraPublished in: IET Circuits Devices Syst. (2011)
Keyphrases
- low voltage
- cmos technology
- high speed
- low power
- silicon on insulator
- metal oxide semiconductor
- nm technology
- low cost
- power consumption
- analog vlsi
- random access memory
- parallel processing
- transmission line
- privacy protection
- circuit design
- information security
- data protection
- power grid
- protection scheme
- vlsi circuits
- delay insensitive
- computer engineering
- real time
- electrical activity
- digital signal processing
- fading channels
- engineering and computer science
- electro mechanical
- power supply
- design considerations
- electrical energy
- information systems