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Statistical Run-Time Verification of Analog Circuits in Presence of Noise and Process Variation.

Rajeev NarayananIbtissem SeghaierMohamed H. ZakiSofiène Tahar
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2013)
Keyphrases
  • analog circuits
  • neural network
  • pattern recognition
  • design process
  • model checking
  • statistical models
  • noisy data