Throughput-Optimized FPGA Accelerator for Deep Convolutional Neural Networks.
Zhiqiang LiuYong DouJingfei JiangJinwei XuShijie LiYongmei ZhouYingnan XuPublished in: ACM Trans. Reconfigurable Technol. Syst. (2017)
Keyphrases
- convolutional neural networks
- field programmable gate array
- convolutional network
- hardware implementation
- response time
- high speed
- embedded systems
- software implementation
- real time
- deep learning
- data acquisition
- image processing algorithms
- hardware design
- hardware architecture
- systolic array
- low cost
- massively parallel
- low latency
- congestion control
- signal processing
- fpga implementation
- image processing