A 12-bit 150-MS/s Sub-Radix-3 SAR ADC With Switching Miller Capacitance Reduction.

Kwuang-Han Chang Chih-Cheng Hsieh

Published in: IEEE J. Solid State Circuits (2018)

Keyphrases

parameter estimation
synthetic aperture radar
bit parallel
high speed
analog to digital converter
high frequency
pattern matching
floating point
unit length
fourier transform
reduction method
neural network
sar images
low power