Highly Optimized Montgomery Multiplier for SIKE Primes on FPGA.
Rami ElkhatibReza AzarderakhshMehran Mozaffari KermaniPublished in: ARITH (2020)
Keyphrases
- highly optimized
- hardware implementation
- fpga implementation
- xilinx virtex
- field programmable gate array
- general purpose
- special purpose
- signal processing
- hardware architecture
- efficient implementation
- low end
- hardware design
- parallel architecture
- image processing algorithms
- smart card
- real time
- integer arithmetic
- parallel computing
- image processing