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A Low-Jitter Area-Efficient LC-VCO Based Clock Generator in 0.13-µm CMOS.

Joonhee LeeSungjun KimSehyung JeonWoojae LeeSeongHwan Cho
Published in: IEICE Trans. Electron. (2009)
Keyphrases
  • power consumption
  • high speed
  • neural network
  • cost effective
  • real time
  • genetic algorithm
  • low cost
  • computationally expensive