R3ToS based Partially Reconfigurable Data Flow Pipelined Network on chip.
Poornima NarayanasamySanthi MuthurathinamSeetharaman GopalakrishnanTughrul ArslanSithu D. SudarsanPublished in: AHS (2018)
Keyphrases
- data flow
- network on chip
- data transfer
- systolic array
- interconnection networks
- routing algorithm
- database machine
- control flow
- network simulator
- digital signal processing
- parallel computers
- power dissipation
- object oriented
- low cost
- message passing
- multi processor
- fault tolerant
- power consumption
- wireless sensor networks
- hardware implementation
- efficient implementation