An Efficient FPGA Design and Performance Testing of the ACE Algorithm for PAPR Reduction in DVB-T2 Systems.
Zhi ZhengGuangjun LiPublished in: IEEE Trans. Broadcast. (2017)
Keyphrases
- hardware implementation
- detection algorithm
- learning algorithm
- computational complexity
- dynamic programming
- worst case
- fpga implementation
- preprocessing
- cost function
- simulated annealing
- segmentation algorithm
- objective function
- computationally efficient
- k means
- efficient implementation
- hardware architecture
- optimal solution
- phase shift