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Error-free VLSI architecture for the 2-D Daubechies 4-tap filter using algebraic integers.
Shiva Madishetty
Arjuna Madanayake
Renato J. Cintra
Dale H. Mugler
Vassil S. Dimitrov
Published in:
ISCAS (2012)
Keyphrases
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error free
vlsi architecture
low complexity
vlsi implementation
low power
real time
error prone
error resilience
distributed video coding
fir filters
image compression
error resilient
low cost
wavelet transform
wavelet decomposition
power consumption
compression algorithm
high speed