A 280-325 GHz Frequency Multiplier Chain With 2.5 dBm Peak Output Power.

Peigen Zhou Jixin Chen Pinpin Yan Zhe Chen Debin Hou Wei Hong

Published in: CICC (2019)

Keyphrases

power consumption
clock gating
power reduction
clock frequency
high speed
dielectric constant
low power
multiscale
frequency distribution
signal noise ratio
database
data sets
low cost
input data
input variables
floating point