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On-Chip Measurement System for Within-Die Delay Variation of Individual Standard Cells in 65-nm CMOS.
Xin Zhang
Koichi Ishida
Hiroshi Fuketa
Makoto Takamiya
Takayasu Sakurai
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2012)
Keyphrases
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cmos technology
high speed
power dissipation
nm technology
analog vlsi
low cost
power consumption
circuit design
low power
metal oxide semiconductor
silicon on insulator
single chip
power supply
random access memory
image sensor
parallel processing
chip design
dynamic range
steady state