A synchronous latency-insensitive RISC for better than worst-case design.

Mario R. Casu Paolo Mantovani

Published in: Integr. (2015)

Keyphrases

evolutionary algorithm
worst case
design process
hardware architecture
optimal design
building blocks
software development
running times
average case
design methodology
engineering design
data sets
software engineering
upper bound
lower bound
computational complexity
optimal solution