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A new design topology for low-voltage CMOS current feedback amplifiers.

Brent J. MaundyAtaur R. SarkarStephan J. G. Gift
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2006)
Keyphrases
  • low voltage
  • design considerations
  • cmos technology
  • power line
  • low power
  • power management
  • random access memory
  • case study
  • design process
  • mixed signal
  • user interface
  • sensor networks
  • low cost