Hardware Implementation of Successive Cancellation Decoders for Polar Codes
Camille LerouxAlexandre J. RaymondGabi SarkisIdo TalAlexander VardyWarren J. GrossPublished in: CoRR (2011)
Keyphrases
- hardware implementation
- decoding algorithm
- signal processing
- efficient implementation
- image processing algorithms
- hardware design
- dedicated hardware
- error correction
- software implementation
- fpga implementation
- parallel architecture
- hardware architecture
- pipeline architecture
- rotation invariant
- fourier transform
- frequency domain
- pattern recognition
- memory management
- fpga device
- image processing