Parallel sparse polynomial multiplication on modern hardware architectures.
Francesco BiscaniPublished in: ISSAC (2012)
Keyphrases
- hardware architectures
- computational power
- parallel processing
- hardware architecture
- parallel implementation
- shared memory
- high dimensional
- parallel computing
- arithmetic operations
- sparse representation
- signal processing
- data sets
- random projections
- massively parallel
- parallel programming
- pattern recognition
- computer vision