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Low-voltage reduced complexity cells for MOS translinear loops.

Costas PsychalinosCostas Laoudias
Published in: Circuits Syst. Signal Process. (2013)
Keyphrases
  • reduced complexity
  • low voltage
  • floating gate
  • vector quantization
  • design considerations
  • power management
  • cmos technology
  • motion estimation algorithm
  • three dimensional
  • image sequences