Login / Signup
200 MS/s ADC implemented in a FPGA employing TDCs.
Harald Homulle
Francesco Regazzoni
Edoardo Charbon
Published in:
FPGA (2015)
Keyphrases
</>
search tools
real time
information extraction
signal processing
field programmable gate array
databases
search engine
keywords
low cost
user behavior
hardware implementation
software implementation
real time image processing
fpga implementation
pipelined architecture