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A chip-scale heterodyne optical phase-locked loop with low-power consumption.
Arda Simsek
Shamsul Arafin
Seong-Kyun Kim
Gordon Morrison
Leif A. Johansson
Milan Mashanovitch
Larry A. Coldren
Mark J. W. Rodwell
Published in:
OFC (2017)
Keyphrases
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low power consumption
phase locked loop
low cost
low power
power consumption
real time
application specific
single chip
storage devices
cmos image sensor
multipath
processing capabilities
security mechanisms
field programmable gate array
high speed
high voltage
lightweight
intrusion detection
image sensor