Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS.
Karel HeyseTom DavidsonElias VansteenkisteKarel BruneelDirk StroobandtPublished in: FPL (2013)
Keyphrases
- efficient implementation
- coarse grained
- hardware implementation
- fine grained
- field programmable gate array
- active set
- reconfigurable hardware
- protein sequences
- high level
- shared memory
- hardware architecture
- image segmentation
- contact maps
- hiv protease
- smart camera
- low cost
- parallel architectures
- parallel computing
- image processing algorithms
- embedded systems
- signal processing
- machine learning