Hardware Implementation of Discrete Hirschman Transform Convolution Using Distributed Arithmetic.

Dingli Xue Victor E. DeBrunner Linda S. DeBrunner

Published in: ACSSC (2019)

Keyphrases

hardware implementation
signal processing
discrete fourier transform
pipelined architecture
efficient implementation
fpga implementation

distributed systems
hardware design
software implementation
dedicated hardware
image processing algorithms
field programmable gate array

translation invariant
pipeline architecture
hardware architecture
memory management
image binarization
fast fourier transform

pattern recognition
parallel architecture
neural network
fpga technology
general purpose