Two-Dimensional Sine Chaotification System With Hardware Implementation.
Zhongyun HuaYicong ZhouBocheng BaoPublished in: IEEE Trans. Ind. Informatics (2020)
Keyphrases
- pipeline architecture
- hardware implementation
- signal processing
- three dimensional
- efficient implementation
- image processing algorithms
- hardware design
- field programmable gate array
- hardware architecture
- fpga implementation
- software implementation
- parallel architecture
- image binarization
- real time
- memory management
- dedicated hardware
- low cost
- fine grained
- image quality
- euler number