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A Reconfigurable Asynchronous SERDES for Heterogenous Chiplet Interconnects.
Jainaveen Sundaram
Srinivasan Gopal
Thomas P. Thomas
Edward Burton
Erika Ramirez
Published in:
ISQED (2021)
Keyphrases
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low cost
input output
general purpose
reconfigurable architecture
lower cost
fiber optic
data sources
systolic array
multi objective evolutionary
hardware implementation
asynchronous communication
delay insensitive
real world
online discussion
real time
fine grain
data mining
digital signal