Design of a Low-Power and Area-Efficient LDO Regulator Using a Negative-R-Assisted Technique.
Jung Sik KimKhurram JavedJeongjin RohPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2023)
Keyphrases
- low power
- single chip
- power consumption
- high speed
- low cost
- low power consumption
- logic circuits
- digital signal processing
- vlsi architecture
- power dissipation
- cmos technology
- power reduction
- gate array
- nm technology
- highly efficient
- steady state
- wireless transmission
- ultra low power
- design considerations
- image sensor
- real time
- design process