Low Power Design of the Neuroprocessor.

Abhijit S. Pandya Ankur Agarwal Pyeoung Kee Kim

Published in: KES (2003)

Keyphrases

low power
single chip
power consumption
high speed
low cost
vlsi architecture
low power consumption
logic circuits
cmos technology
digital signal processing
power dissipation
gate array
power reduction
high power
design process
power saving
general purpose
nm technology
image processing