A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection.
Haoran LyuFengwei AnShirui ZhaoWei MaoHao YuPublished in: IEEE Des. Test (2022)
Keyphrases
- memory management
- processing elements
- memory hierarchy
- memory access
- memory subsystem
- level parallelism
- parallel architecture
- multi processor
- instruction set
- single instruction multiple data
- multithreading
- associative memory
- management system
- random access
- computing power
- industry standard
- operating system
- bit rate
- high speed
- single chip
- hardware architecture
- massively parallel
- data flow
- parallel processing
- main memory
- software architecture