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Parallel Responsive Task on Dependable Responsive Multithreaded Processor II.
Hiroyuki Chishiro
Yusuke Hatori
Kohei Osawa
Keigo Mizotani
Nobuyuki Yamasaki
Published in:
CPSNA (2016)
Keyphrases
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parallel implementation
distributed memory
parallel architecture
parallel computation
multithreading
single processor
data parallelism
parallel computers
multi processor
data sets
fault tolerant
high speed
shared memory