Evaluating the Hardware Performance of a Million-Bit Multiplier.
Yarkin DorözErdinç ÖztürkBerk SunarPublished in: DSD (2013)
Keyphrases
- hardware implementation
- random number generator
- low cost
- hardware and software
- real time
- embedded systems
- integer arithmetic
- computer systems
- vlsi implementation
- efficient implementation
- parallel hardware
- protection scheme
- real world
- random number
- high end
- floating point
- high quality
- signal processing
- interior point methods
- hardware architecture
- computing systems
- information systems
- personal computer
- ibm zenterprise
- neural network