A real-time digital VCR encode/decode and MPEG-2 decode LSI implemented on a dual-issue RISC processor.
Atsushi MohriAkira YamadaY. YoshidaHisakazu SatoHidehiro TakataK. NakakimuraM. HashizumeY. ShimotsumaK. TsuchihashiPublished in: IEEE J. Solid State Circuits (1999)
Keyphrases
- real time
- fpga device
- high speed
- digital video
- instruction set
- low cost
- digital signal processor
- parallel processing
- multimedia
- application specific
- hardware implementation
- pipelined architecture
- video on demand
- computation intensive
- digital television
- low power consumption
- cell processor
- hardware architecture
- single chip
- iso iec
- distributed memory
- latent semantic indexing
- shared memory
- vision system