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A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.
Huiying Zhuo
Yu Li
Woogeun Rhee
Zhihua Wang
Published in:
VLSI-DAT (2014)
Keyphrases
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weak signal
high speed
neural network
digital libraries
false positives