Login / Signup

A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS.

Huiying ZhuoYu LiWoogeun RheeZhihua Wang
Published in: VLSI-DAT (2014)
Keyphrases
  • weak signal
  • high speed
  • neural network
  • digital libraries
  • false positives