Partitioning and Mapping Communication Graphs on a Modular Reconfigurable Parallel Architecture.
V. DavidC. FraboulJ. Y. RousselotPierre SironPublished in: CONPAR (1992)
Keyphrases
- parallel architecture
- systolic array
- hardware implementation
- parallel processing
- graph partitioning
- shared memory
- spectral graph
- high level synthesis
- synthetic aperture sonar
- low cost
- data flow
- parallel implementation
- distributed memory
- weighted graph
- parallel algorithm
- image matching
- signal processing
- markov random field
- image processing algorithms
- field programmable gate array
- higher order
- mobile robot
- pairwise
- cooperative
- computer vision