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A 0.5V 20fJ/conversion-step rail-to-rail SAR ADC with programmable time-delayed control units for low-power biomedical application.
Sun-Il Chang
Khaled Al-Ashmouny
Euisik Yoon
Published in:
ESSCIRC (2011)
Keyphrases
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low power
high speed
single chip
low cost
power consumption
ultra low power
signal processor
image sensor
real time
vlsi architecture
high power
low power consumption
vlsi circuits
cmos technology
mixed signal
logic circuits
general purpose