A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency.

Peter Caputa Christer Svensson

Published in: VLSI Design (2006)

Keyphrases

high speed
low latency
low cost
low power
data sets
genetic algorithm
database systems
response time
real time
neural network
image sequences
optical flow
velocity field
single chip
analog vlsi