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Power Efficient High-Level Synthesis by Centralized and Fine-Grained Clock Gating.
Mohsen Riahi Alam
Mostafa Ersali Salehi Nasab
Sied Mehdi Fakhraie
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2015)
Keyphrases
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fine grained
coarse grained
high level synthesis
power consumption
access control
information systems
case study
data lineage
distributed environment
multithreading
power reduction