Compute-unified device architecture implementation of a block-matching algorithm for multiple graphical processing unit cards.
Francesc MassanesMarie CadennesJovan G. BrankovPublished in: J. Electronic Imaging (2011)
Keyphrases
- processing units
- graphics processing units
- compute unified device architecture
- block matching algorithm
- parallel computing
- motion estimation
- parallel processing
- stereo vision
- motion compensation
- general purpose
- matching algorithm
- three dimensional
- parallel algorithm
- real time
- data management
- computing systems
- higher order
- multiple types
- high performance computing
- image segmentation
- information systems