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Design of Low-latency Synthesizable PUCCH Demodulation Unit Using Simulink HDL Coder.

Young-Hoon KimHyungsik JuIk-Jae ChunChan Bok JeongMoon-Sik Lee
Published in: ICTC (2021)
Keyphrases
  • low latency
  • design methodology
  • real time
  • highly efficient
  • hardware design
  • computational complexity
  • high speed
  • massive scale