Login / Signup
Design of Low-latency Synthesizable PUCCH Demodulation Unit Using Simulink HDL Coder.
Young-Hoon Kim
Hyungsik Ju
Ik-Jae Chun
Chan Bok Jeong
Moon-Sik Lee
Published in:
ICTC (2021)
Keyphrases
</>
low latency
design methodology
real time
highly efficient
hardware design
computational complexity
high speed
massive scale